Skip to main content

This job has expired

Design Engineer

Employer
UST
Location
Burnsville
Salary
Competitive

View more

Job Description:

?? Design and build memory or circuit blocks at the gate or transistor level

?? Simulate and analyse the circuit design using transistor level simulators

?? Extract the layout and perform post-layout simulations and verification

?? Floorplan physical implementation and leaf cell layout integration to build the physical macro

?? Integrate characterization flow to extract timing and power information

?? Use/Modify scripts to automate characterization flow, simulations, and verification

?? Specify and verify various behavioural and physical memory models

?? Document the design specifications, behavioural description, and timing diagrams

Get job alerts

Create a job alert and receive personalized job recommendations straight to your inbox.

Create alert